Another Imlac Update: In Which Foreheads Are Slapped

Well... as it turns out I may in fact have been entirely mistaken about the problem this whole time.

I was puzzled by a certain behavior of the front panel, namely that toggling the Read/Store/Continue switches would actually do their associated action about 50% of the time, but "Start" never actually started the system running, even though based on my interpretation of the schematic, once the one-shot successfully meshes with the RUN CLK signal, it should just be off and running.

I was still a bit fuzzy about the behavior of the RUN / RUN SYNC flip flops so I wired up the logic analyzer to watch all the inputs and outputs, and I discovered that when the Preset input (pin 7, from the one-shot driven by the front panel) went low, Q/-Q would change state... but only as long as Preset stayed low.  Once preset went high again, Q flipped back off.  My understanding is that Q/-Q should hold the new state if Clear is high... but wait... Clear is low.

So... what drives the Clear input?  The "GATED PS RDY" line. Which is active high and is currently low.  Oh, good.  So to confirm my suspicions, I isolated the Clear input from the circuit and wired it to Pin 3 of the flip-flop (which is currently connected to +5V though a current-limiting resistor).  Fired it up... and everything works normally again.

Sigh.  So apparently if the power supply "Ready" line doesn't come high, the machine just acts bonkers.  That's good to know.

Well, now to figure out why the power supply isn't coming ready.  The supply voltages look fine, so this should be interesting.  I traced the GATED PS RDY line back to the "Misc. Control" card (board 232) and the "P/S RDY" line is always low.  This is connected to "TB3-1" which is actually on the supply itself.  Should be good, good fun.

With that, it's well past time for bed...